David Rowe has an excellent article about Running Asterisk on an FPGA.

From the Article:

Many clever tricks are possible with a FPGA, for example you can just “compile in” a floating point unit, include all your system glue logic on the same FPGA, or provide hardware acceleration for application specific tasks. In this case, FIR filters used for echo cancellation have been sped up by a factor of 300, using a little custom hardware implemented on the FPGA.

Great work Digital Opsys

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